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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Current Information@www.mot.com/ADC
MC92308
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OFDM Demodulator
The MC92308 is a Orthogonal Frequency Division Multiplex Demodulator for 2K transmission mode according to the ETSI specification for digital terrestrial broadcasting (PR ETS 300744). The MC92308 contains all the functionality required to demodulate the information transmitted in one UHF channel. Feature Summary * * * * * * * * * * * * * * Usable for 8MHz/7MHz/6MHz channels by adjusting the clock rate Digital I/Q separation on-chip Supports QPSK, 16-QAM and 64-QAM Supports all guard interval lengths (1/32, 1/16, 1/8, 1/4) Accepts 8-bit TTL-compatible twos-complement data input Provides the required control signals for Automatic Gain Control and ADC clock frequency control Performs channel estimation and correction by using the embedded pilot carriers I2C serial bus compatible interface (M-Bus) and parallel interface for external programming and control of the device Transmission Parameter Signalling is decoded and made available to the system controller via M-Bus or parallel microprocessor interface Companion to DVB compliant 2K-FFT Processor (MC92307) Output interface for DBV compliant FEC Fast synchronization at power-on and after channel switch Low implementation margin 0.5 CMOS Process at 3.3V
RESB CLK CLKCTLP CLKCTLN AGCCTLP AGCCTLN ADCDATA[7:0] CLKEN18 FFTSTART FFTDO[7:0] SYMSYNC FFTDI[11:0] MBUS[1:0] FECCLK DVALID G1DATA[2:0] G2DATA[2:0]
Ordering Information
Device MC92308CI Package 160MQUAD
Figure 1. OFDM Frontend Processing
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
(c) MOTOROLA, INC. 1997 5/7/97
ADCDATA0 ADCDATA1 ADCDATA2 ADCDATA3 VDD VSS ADCDATA4 ADCDATA5 ADCDATA6 ADCDATA7 VDD VSS VDD VSS CLKEN18 CLK VDD VSS VDD CLKCTLP CLKCTLN VDD VSS AGCCTLP AGCCTLN VDD VSS VSS VSS VDD VDD VDD VSS VSS VDD VSS MADDR0 MADDR1 MADDR2 MADDR3
VSS VSS VSS VDD VDD VSS FFTDO7 FFTDO6 FFTDO5 VDD FFTDO4 FFTDO3 FFTDO2 VSS FFTDO1 FFTDO0 FFTSTART SYMSYNC FFTDI11 VDD VSS FFTDI10 FFTDI9 FFTDI8 FFTDI7 VDD FFTDI6 FFTDI5 FFTDI4 FFTDI3 VSS FFTDI2 FFTDI1 FFTDI0 VDD VDD VSS VSS VDD VDD
160MQUAD
reserved (VSS) reserved (VSS) reserved (VSS) VSS VDD reserved (VSS) reserved (VSS) reserved (VSS) reserved (VSS) reserved (VSS) reserved (VSS) VSS VDD reserved (VSS) reserved (VSS) RESB VSS VDD reserved (open) reserved (open) reserved (open) reserved (open) reserved (open) reserved (open) VSS VDD reserved (open) reserved (open) reserved (open) VSS VDD reserved (open) reserved (open) VSS VDD reserved (open) reserved (open) reserved (open) VSS VDD
SIGNAL CLK RESB CLKEN18 ADCDATA[7:0] CLKCTLP CLKCTLN AGCCTLP AGCCTLN FFTSTART FFTDO[7:0]
MADDR4 MADDR5 VDD VSS VDD VSS MDATA0 MDATA1 MDATA2 MDATA3 MDATA4 MDATA5 VDD VSS MDATA6 MDATA7 MCSB MWRB MRDB VDD VSS MBUSID0 MBUSID1 MBUSID2 MBUSID3 MSCL MSDA VDD VSS MSEL FECVALID FECCLK G1DATA0 G1DATA1 G1DATA2 VDD VSS G2DATA0 G2DATA1 G2DATA2
Table 1. MC92308 Pin Description
FUNCTIONALITY Common clock input (36.57 MHz) Reset (synchronous) ADC data strobe Input for samples from ADC ADC clock synchronization loop (+) ADC clock synchronization loop (-) Analog AGC loop (+) Analog AGC loop (-) FFT start signal Complex data output to FFT (muxed) TYPE TTL - IN TTL - IN TTL - IN TTL - IN TTL - OUT TTL - OUT TTL - OUT TTL - OUT TTL - OUT TTL - OUT POLTY high low high high high low high low high high
MOTOROLA 2
MC92308 Rev.1.4
Table 1. MC92308 Pin Description (Continued)
SIGNAL FFTDI[11:0] SYMSYNC G1DATA[2:0] G2DATA[2:0] FECCLK FECDVALID MSDA MSCL MBUSID[3:0]] MSEL MDATA[7:0] MADDR[5:0] MCSB MWRB MRDB FUNCTIONALITY Complex data input from FFT (muxed) Symbol start signal from FFT Data output for Viterbi decoder Data output for Viterbi decoder Clock for Viterbi Decoder (free running) Data valid signal for Viterbi Decoder I2C compatible control bus, data pin I2C compatible control bus, clock pin I C compatible control bus, variable ID selector Enable Microprocessor parallel interface Microprocessor interface bidirectional databus Microprocessor interface address bus Microprocessor interface chip select Microprocessor interface write enable Microprocessor interface read enable
2
TYPE TTL - IN TTL - IN TTL - OUT TTL - OUT TTL - OUT TTL - OUT TTL - OD TTL - IN TTL - IN TTL - IN TTL - bidir TTL - IN TTL - IN TTL - IN TTL - IN
POLTY high high high high high high high high high high high low low low
Notes: _________________________________________________________ _________________________________________________________ _________________________________________________________ _________________________________________________________ _________________________________________________________ _________________________________________________________ _________________________________________________________ _________________________________________________________ _________________________________________________________ _________________________________________________________ _________________________________________________________
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MC92308 Rev.1.4
MOTOROLA 3
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TM
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MC92308

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